C8051F336_08 Datasheet, PDF (88/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
SFR Definition 15.4. EIP1: Extended Interrupt Priority 1
Bit
7
Name ^PT3
Type ^R/W
Reset
0
6
Reserved
R/W
0
5
PCP0
R/W
0
4
PPCA0
R/W
0
3
PADC0
R/W
0
2
PWADC0
R/W
0
1
PMAT
R/W
0
SFR Address = 0xF6
Bit Name
Function
7
PT3 _{Timer 3 Interrupt Priority Control.}
This bit sets the priority of the Timer 3 interrupt.
0: Timer 3 interrupts set to low priority level.
1: Timer 3 interrupts set to high priority level.
6 Reserved Reserved. Must Write 0.
5 PCP0 _{Comparator0 (CP0) Interrupt Priority Control.}
This bit sets the priority of the CP0 interrupt.
0: CP0 interrupt set to low priority level.
1: CP0 interrupt set to high priority level.
4 PPCA0 _{Programmable Counter Array (PCA0) Interrupt Priority Control.}
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
3 PADC0 _{ADC0 Conversion Complete Interrupt Priority Control.}
This bit sets the priority of the ADC0 Conversion Complete interrupt.
0: ADC0 Conversion Complete interrupt set to low priority level.
1: ADC0 Conversion Complete interrupt set to high priority level.
2 PWADC0 _{ADC0 Window Comparator Interrupt Priority Control.}
This bit sets the priority of the ADC0 Window interrupt.
0: ADC0 Window interrupt set to low priority level.
1: ADC0 Window interrupt set to high priority level.
1 PMAT _{Port Match Interrupt Priority Control.}
This bit sets the priority of the Port Match Event interrupt.
0: Port Match interrupt set to low priority level.
1: Port Match interrupt set to high priority level.
0 PSMB0 _{SMBus (SMB0) Interrupt Priority Control.}
This bit sets the priority of the SMB0 interrupt.
0: SMB0 interrupt set to low priority level.
1: SMB0 interrupt set to high priority level.
0
PSMB0
R/W
0
88
Rev.1.0