C8051F336_08 Datasheet, PDF (3/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
Table of Contents
1. System Overview ..................................................................................................... 15
2. Ordering Information ............................................................................................... 18
3. Pin Definitions.......................................................................................................... 19
4. QFN-20 Package Specifications ............................................................................. 23
5. QFN-24 Package Specifications ............................................................................. 25
6. Electrical Characteristics ........................................................................................ 27
6.1. Absolute Maximum Specifications..................................................................... 27
6.2. Electrical Characteristics ................................................................................... 28
6.3. Typical Performance Curves ............................................................................. 36
7. 10-Bit ADC (ADC0, C8051F336/8 only)................................................................... 37
7.1. Output Code Formatting .................................................................................... 38
7.2. Modes of Operation ........................................................................................... 38
7.2.1. Starting a Conversion................................................................................ 38
7.2.2. Tracking Modes......................................................................................... 39
7.2.3. Settling Time Requirements...................................................................... 40
7.3. Programmable Window Detector....................................................................... 44
7.3.1. Window Detector In Single-Ended Mode .................................................. 46
7.3.2. Window Detector In Differential Mode....................................................... 47
7.4. ADC0 Analog Multiplexer (C8051F336/8 only).................................................. 48
8. Temperature Sensor (C8051F336/8 only) .............................................................. 51
9. 10-Bit Current Mode DAC (IDA0, C8051F336/8 only) ............................................ 52
9.1. IDA0 Output Scheduling .................................................................................... 52
9.1.1. Update Output On-Demand ...................................................................... 52
9.1.2. Update Output Based on Timer Overflow ................................................. 53
9.1.3. Update Output Based on CNVSTR Edge ................................................. 53
9.2. IDAC Output Mapping ....................................................................................... 53
10. Voltage Reference (C8051F336/8 only) ................................................................ 56
11. Comparator0........................................................................................................... 58
11.1. Comparator Multiplexer ................................................................................... 63
12. CIP-51 Microcontroller........................................................................................... 65
12.1. Instruction Set.................................................................................................. 66
12.1.1. Instruction and CPU Timing .................................................................... 66
12.2. CIP-51 Register Descriptions .......................................................................... 71
13. Memory Organization ............................................................................................ 74
13.1. Program Memory............................................................................................. 75
13.1.1. MOVX Instruction and Program Memory ................................................ 75
13.2. Data Memory ................................................................................................... 75
13.2.1. Internal RAM ........................................................................................... 75
13.2.1.1. General Purpose Registers ............................................................ 76
13.2.1.2. Bit Addressable Locations .............................................................. 76
13.2.1.3. Stack ............................................................................................ 76
13.2.2. External RAM .......................................................................................... 76
Rev.1.0
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