C8051F336_08 Datasheet, PDF (178/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
NSS
T
T
T
SE
CKL
SD
SCK*
T
CKH
T
SIS
T
SIH
MOSI
MISO
T
SEZ
T
SOH
T
SDZ
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 23.10. SPI Slave Timing (CKPHA = 0)
NSS
T
T
T
SE
CKL
SD
SCK*
T
CKH
T
SIS
T
SIH
MOSI
T
SEZ
MISO
T
SOH
T
SLH
T
SDZ
* SCK is shown for CKPOL = 0. SCK is the opposite polarity for CKPOL = 1.
Figure 23.11. SPI Slave Timing (CKPHA = 1)
178
Rev.1.0