C8051F336_08 Datasheet, PDF (210/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
25.3.5.1. 8-bit Pulse Width Modulator Mode
The duty cycle of the PWM output signal in 8-bit PWM mode is varied using the module's PCA0CPLn cap-
ture/compare register. When the value in the low byte of the PCA counter/timer (PCA0L) is equal to the
value in PCA0CPLn, the output on the CEXn pin will be set. When the count value in PCA0L overflows, the
CEXn output will be reset (see Figure 25.8). Also, when the counter/timer low byte (PCA0L) overflows from
0xFF to 0x00, PCA0CPLn is reloaded automatically with the value stored in the module’s capture/compare
high byte (PCA0CPHn) without software intervention. Setting the ECOMn and PWMn bits in the
PCA0CPMn register, and setting the CLSEL bits in register PCA0PWM to 00b enables 8-Bit Pulse Width
Modulator mode. If the MATn bit is set to 1, the CCFn flag for the module will be set each time an 8-bit
comparator match (rising edge) occurs. The COVF flag in PCA0PWM can be used to detect the overflow
(falling edge), which will occur every 256 PCA clock cycles. The duty cycle for 8-Bit PWM Mode is given in
Equation 25.2.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Duty Cycle = ⁽---2---5---6----–-----^P----^C----^A----0----^C----^P----^H-----ⁿ----⁾
256
Equation 25.2. 8-Bit PWM Duty Cycle
Using Equation 25.2, the largest duty cycle is 100% (PCA0CPHn = 0), and the smallest duty cycle is
0.39% (PCA0CPHn = 0xFF). A 0% duty cycle may be generated by clearing the ECOMn bit to 0.
Write to
PCA0CPLn
0
ENB
Reset
Write to
PCA0CPHn ^ENB
1
PCA0PWM
AEC
CC
RCO
LL
SOV
SS
EVF
EE
L
LL
10
0x
00
PCA0CPMn
PECCMT PE
WC A A A O WC
MO P P T GMC
1 MPN n n n F
6nnn
n
n
0 00x0 x
PCA0CPHn
COVF
PCA0CPLn
Enable
8-bit
Comparator
match _S SET _Q CEXn _Crossbar
R CLR Q
PCA Timebase
PCA0L
Overflow
Figure 25.8. PCA 8-Bit PWM Mode Diagram
Port I/O
210
Rev.1.0