C8051F336_08 Datasheet, PDF (74/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
13. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization of the
C8051F336/7/8/9 device family is shown in Figure 13.1
PROGRAM/DATA MEMORY
(FLASH)
0x3E00
0x3DFF
RESERVED
16 K FLASH
(In-System
Programmable in 512
Byte Sectors)
0x0000
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
DATA MEMORY (RAM)
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
(Indirect Addressing
Only)
Special Function
Register's
(Direct Addressing Only)
(Direct and Indirect
Addressing)
Bit Addressable
General Purpose
Registers
Lower 128 RAM
(Direct and Indirect
Addressing)
0xFFFF
EXTERNAL DATA ADDRESS SPACE
Same 512 bytes as from
0x0000 to 0x01FF, wrapped
on 512-byte boundaries
0x0200
0x01FF
0x0000
XRAM - 512 Bytes
(accessable using MOVX
instruction)
Figure 13.1. C8051F336/7/8/9 Memory Map
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Rev.1.0