C8051F336_08 Datasheet, PDF (78/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
14. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the C8051F336/7/8/9's resources and peripher-
als. The CIP-51 controller core duplicates the SFRs found in a typical 8051 implementation as well as
implementing additional SFRs used to configure and access the sub-systems unique to the
C8051F336/7/8/9. This allows the addition of new functionality while retaining compatibility with the MCS-
51™ instruction set. Table 14.1 lists the SFRs implemented in the C8051F336/7/8/9 device family.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the data sheet, as indicated in
Table 14.2, for a detailed description of each register.
Table 14.1. Special Function Register (SFR) Memory Map
F8 SPI0CN PCA0L PCA0H PCA0CPL0 PCA0CPH0 P0MAT P0MASK VDM0CN
F0
B
P0MDIN P1MDIN P2MDIN
EIP1 PCA0PWM
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2 P1MAT P1MASK RSTSRC
E0 ACC
D8 PCA0CN
D0 PSW
XBR0
XBR1 OSCLCN IT01CF
PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2
REF0CN
P0SKIP P1SKIP
EIE1 SMB0ADM
P2SKIP SMB0ADR
C8 TMR2CN
TMR2RLL TMR2RLH TMR2L TMR2H
C0 SMB0CN SMB0CF SMB0DAT ADC0GTL ADC0GTH ADC0LTL ADC0LTH
B8 IP
IDA0CN AMX0N AMX0P ADC0CF ADC0L ADC0H
B0
OSCXCN OSCICN OSCICL
FLSCL
FLKEY
A8 IE
CLKSEL EMI0CN
A0 P2
SPI0CFG SPI0CKR SPI0DAT P0MDOUT P1MDOUT P2MDOUT
98 SCON0 SBUF0
CPT0CN
90 P1
TMR3CN TMR3RLL TMR3RLH TMR3L
CPT0MD
TMR3H
IDA0L
CPT0MX
IDA0H
88 TCON
TMOD
TL0
TL1
TH0
TH1
CKCON PSCTL
80 P0
SP
DPL
DPH
PCON
0(8)
1(9)
2(A)
3(B)
4(C)
5(D)
6(E)
7(F)
Note: SFR Addresses ending in 0x0 or 0x8 are bit-addressable locations and can be used with bitwise instructions.
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Rev.1.0