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C8051F336_08 Datasheet, PDF (77/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU
C8051F336/7/8/9
SFR Definition 13.1. EMI0CN: External Memory Interface Control
Bit
7
6
5
4
3
2
1
0
Name
PGSEL
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xAA
Bit Name
Function
7:1 UNUSED Unused. Read = 0000000b; Write = Don’t Care
0 PGSEL XRAM Page Select.
The EMI0CN register provides the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page
of RAM. Since the upper (unused) bits of the register are always zero, the PGSEL
determines which page of XRAM is accessed.
For Example: If EMI0CN = 0x01, addresses 0x0100 through 0x01FF will be
accessed.
Rev.1.0
77