C8051F336_08 Datasheet, PDF (23/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

4. QFN-20 Package Specifications
C8051F336/7/8/9
Figure 4.1. QFN-20 Package Drawing
Table 4.1. QFN-20 Package Dimensions
Dimension Min
Typ
Max
Dimension Min
Typ
Max
A
0.80
0.90
1.00
A1
0.00
0.02
0.05
b
0.18
0.25
0.30
D
4.00 BSC.
D2
2.00
2.15
2.25
e
0.50 BSC.
E
4.00 BSC.
E2
2.00
2.15
2.25
L
0.45
0.55
0.65
L1
0.00
—
0.15
aaa
—
—
0.15
bbb
—
—
0.10
ddd
—
—
0.05
eee
—
—
0.08
Z
—
0.43
—
Y
—
0.18
—
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-220, variation VGGD except for
custom features D2, E2, Z, Y, and L which are toleranced per supplier designation.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification for Small
Body Components.
Rev.1.0
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