C8051F336_08 Datasheet, PDF (54/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
SFR Definition 9.1. IDA0CN: IDA0 Control
Bit
7
6
5
4
3
2
Name ^IDA0EN
IDA0CM[2:0]
Type ^R/W
R/W
R
R
Reset
0
1
1
1
0
0
SFR Address = 0xB9
Bit
Name
Function
7
IDA0EN _{IDA0 Enable.}
0: IDA0 Disabled.
1: IDA0 Enabled.
6:4 IDA0CM[2:0] _{IDA0 Update Source Select bits.}
000: DAC output updates on Timer 0 overflow.
001: DAC output updates on Timer 1 overflow.
010: DAC output updates on Timer 2 overflow.
011: DAC output updates on Timer 3 overflow.
100: DAC output updates on rising edge of CNVSTR.
101: DAC output updates on falling edge of CNVSTR.
110: DAC output updates on any edge of CNVSTR.
111: DAC output updates on write to IDA0H.
3:2 Unused Unused. Read = 00b. Write = Don’t care.
1:0 IDA0OMD[1:0] _{IDA0 Output Mode Select bits.}
00: 0.5 mA full-scale output current.
01: 1.0 mA full-scale output current.
1x: 2.0 mA full-scale output current.
1
0
IDA0OMD[1:0]
R/W
1
0
54
Rev.1.0