C8051F336_08 Datasheet, PDF (13/227 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051F336/7/8/9
SFR Definition 20.4. P0MAT: Port 0 Match Register .................................................. 130
SFR Definition 20.5. P1MASK: Port 1 Mask Register ................................................. 130
SFR Definition 20.6. P1MAT: Port 1 Match Register .................................................. 131
SFR Definition 20.7. P0: Port 0 ................................................................................... 132
SFR Definition 20.8. P0MDIN: Port 0 Input Mode ....................................................... 132
SFR Definition 20.9. P0MDOUT: Port 0 Output Mode ................................................ 133
SFR Definition 20.10. P0SKIP: Port 0 Skip ................................................................. 133
SFR Definition 20.11. P1: Port 1 ................................................................................. 134
SFR Definition 20.12. P1MDIN: Port 1 Input Mode ..................................................... 134
SFR Definition 20.13. P1MDOUT: Port 1 Output Mode .............................................. 135
SFR Definition 20.14. P1SKIP: Port 1 Skip ................................................................. 135
SFR Definition 20.15. P2: Port 2 ................................................................................. 136
SFR Definition 20.16. P2MDIN: Port 2 Input Mode ..................................................... 136
SFR Definition 20.17. P2MDOUT: Port 2 Output Mode .............................................. 137
SFR Definition 20.18. P2SKIP: Port 2 Skip ................................................................. 137
SFR Definition 21.1. SMB0CF: SMBus Clock/Configuration ...................................... 144
SFR Definition 21.2. SMB0CN: SMBus Control .......................................................... 146
SFR Definition 21.3. SMB0ADR: SMBus Slave Address ............................................ 148
SFR Definition 21.4. SMB0ADM: SMBus Slave Address Mask .................................. 149
SFR Definition 21.5. SMB0DAT: SMBus Data ............................................................ 150
SFR Definition 22.1. SCON0: Serial Port 0 Control .................................................... 164
SFR Definition 22.2. SBUF0: Serial (UART0) Port Data Buffer .................................. 165
SFR Definition 23.1. SPI0CFG: SPI0 Configuration ................................................... 174
SFR Definition 23.2. SPI0CN: SPI0 Control ............................................................... 175
SFR Definition 23.3. SPI0CKR: SPI0 Clock Rate ....................................................... 176
SFR Definition 23.4. SPI0DAT: SPI0 Data ................................................................. 176
SFR Definition 24.1. CKCON: Clock Control .............................................................. 181
SFR Definition 24.2. TCON: Timer Control ................................................................. 186
SFR Definition 24.3. TMOD: Timer Mode ................................................................... 187
SFR Definition 24.4. TL0: Timer 0 Low Byte ............................................................... 188
SFR Definition 24.5. TL1: Timer 1 Low Byte ............................................................... 188
SFR Definition 24.6. TH0: Timer 0 High Byte ............................................................. 189
SFR Definition 24.7. TH1: Timer 1 High Byte ............................................................. 189
SFR Definition 24.8. TMR2CN: Timer 2 Control ......................................................... 193
SFR Definition 24.9. TMR2RLL: Timer 2 Reload Register Low Byte .......................... 194
SFR Definition 24.10. TMR2RLH: Timer 2 Reload Register High Byte ...................... 194
SFR Definition 24.11. TMR2L: Timer 2 Low Byte ....................................................... 194
SFR Definition 24.12. TMR2H Timer 2 High Byte ....................................................... 195
SFR Definition 24.13. TMR3CN: Timer 3 Control ....................................................... 199
SFR Definition 24.14. TMR3RLL: Timer 3 Reload Register Low Byte ........................ 200
SFR Definition 24.15. TMR3RLH: Timer 3 Reload Register High Byte ...................... 200
SFR Definition 24.16. TMR3L: Timer 3 Low Byte ....................................................... 200
SFR Definition 24.17. TMR3H Timer 3 High Byte ....................................................... 201
SFR Definition 25.1. PCA0CN: PCA Control .............................................................. 215
SFR Definition 25.2. PCA0MD: PCA Mode ................................................................ 216
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