SI5341 Datasheet, PDF (44/56 Pages) Silicon Laboratories – LOW-JITTER, 10-OUTPUT, ANY-FREQUENCY, ANY-OUTPUT CLOCK GENERATOR

Si5341/40
Table 18. Pin Descriptions (Continued)
Pin Name
Pin Number
Pin Type¹
Si5341 Si5340
Function
Serial Interface
I2C_SEL
39
38
I
I2C Select²
This pin selects the serial interface mode as I²C (I2C_SEL = 1) or
SPI (I2C_SEL = 0). This pin is internally pulled up by a ~ 20 k
resistor to the voltage selected by the IO_VDD_SEL register bit.
SDA/SDIO
18
13
I/O
Serial Data Interface²
This is the bidirectional data pin (SDA) for the I²C mode, or the
bidirectional data pin (SDIO) in the 3-wire SPI mode, or the input
data pin (SDI) in 4-wire SPI mode. When in I²C mode, this pin
must be pulled-up using an external resistor of at least 1 k. No
pull-up resistor is needed when in SPI mode.
A1/SDO
17
15
I/O
Address Select 1/Serial Data Output²
In I²C mode, this pin functions as the A1 address input pin and
does not have an internal pull up or pull down resistor. In 4-wire
SPI mode this is the serial data output (SDO) pin (SDO) pin and
drives high to the voltage selected by the IO_VDD_SEL pin.
SCLK
16
14
I
Serial Clock Input²
This pin functions as the serial clock input for both I²C and SPI
modes.This pin is internally pulled up by a ~20 k resistor to the
voltage selected by the IO_VDD_SEL register bit. In I²C mode
this pin should have an external pull up of at least 1 k. No pull-up
resistor is needed when in SPI mode.
A0/CS
19
16
I
Address Select 0/Chip Select²
This pin functions as the hardware controlled address A0 in I²C
mode. In SPI mode, this pin functions as the chip select input
(active low). This pin is internally pulled up by a ~20 k resistor to
the voltage selected by the IO_VDD_SEL register bit.
Notes:
1. I = Input, O = Output, P = Power.
2. The IO_VDD_SEL control bit (0x0943 bit 0) selects 3.3 V or 1.8 V operation for the serial interface pins, control input
pins, and status output pins. Refer to the Si5341/40 Family Reference Manual for more information on register settings.
3. If neither serial interface is used, leave pins I2C_SEL, A1/SDO, and A0/CS disconnected and tie SDA/SDIO and SCLK
low.
44
Rev. 1.0