SI5341 Datasheet, PDF(11/56 Page) Silicon Laboratories – LOW-JITTER, 10-OUTPUT, ANY-FREQUENCY, ANY-OUTPUT CLOCK GENERATOR

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

SI5341 Datasheet, PDF (11/56 Pages) Silicon Laboratories – LOW-JITTER, 10-OUTPUT, ANY-FREQUENCY, ANY-OUTPUT CLOCK GENERATOR

◁

Si5341/40

Table 5. Differential Clock Output Specifications (Continued)

(VDD = 1.8 V Â±5%, VDDA = 3.3 V Â±5%, VDDO = 1.8 V Â±5%, 2.5 V Â±5%, or 3.3 V Â±5%, TA = â40 to 85 Â°C)

Parameter

Output-Output Crosstalk

Symbol

XTALK

Test Condition

Si5341

Note 4

Si5341

Note 6

Si5340

Note 7

Min Typ Max

â â75 â

â â85 â

Units

dBc

Notes:

1. The typical normal mode (or low power mode) LVDS maximum is 100 mV (or 80 mV) higher than the TIA/EIA-644

maximum. For normal and low-power modes, the amplitudes are programmable through register settings and can be

stored in NVM. Each output driver can be programmed independently. See Appendix A of the Si5341/40 Reference

Manual.

2. Driver output impedance depends on selected output mode (Normal, Low Power).

3. Measured for 156.25 MHz carrier frequency. Sinewave noise added to VDDO (1.8 V = 50 mVpp, 2.5 V/

3.3 V = 100 mVpp) and noise spur amplitude measured.

OUTx

Vcm

Vpp_se

Vpp_diff = 2*Vpp_se

4. Measured across two adjacent outputs, both in LVDS mode, with the victim running at 155.52 MHz and the aggressor

at 156.25 MHz. Refer to application note, âAN862: Optimizing Si534x Jitter Performance in Next Generation Internet

Infrastructure Systemsâ, guidance on crosstalk minimization.

5. For other amplitudes see Appendix A of the Si5341/40 Reference Manual.

6. See Note 4, but in this case the measurement is across two output clocks that have a single clock between them.

7. Same as Note 4, but the Si5340 has less crosstalk due to the spacing of adjacent outputs.

Table 6. Output Status Pin Specifications

(VDD = 1.8 V Â±5%, VDDA = 3.3 V Â±5%, VDDS = 3.3 V Â±5%, 1.8 V Â±5%, TA = â40 to 85 Â°C)

Parameter

Symbol Test Condition

Min

Typ

Max

Units

Si5341 Status Output Pins (LOL, INTR), SDA/SDIO2, SDO

Output Voltage

VOH

IOH = â2 mA VDDIO1 x 0.75 â

VOL

IOL = 2 mA

â VDDIO1 x 0.15

Si5340 Status Output Pins (INTR), LOL, LOS_XAXB, SDA/SDIO2, SDO

Output Voltage

VOH

IOH = â2 mA VDDIO1 x 0.75 â

VOL

IOL = 2 mA

â VDDIO1 x 0.15

Notes:

1. VDDIO is determined by the IO_VDD_SEL bit. It is selectable as VDDA or VDD. Refer to the Reference Manual for more

details on register settings.

2. The VOH specification does not apply to the open-drain SDA/SDIO output when the serial interface is in I2C mode or is

unused with I2C_SEL pulled high. VOL remains valid in all cases.

Rev. 1.0

▷