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C8051F388 Datasheet, PDF (36/285 Pages) – | |||
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C8051F388/9/A/B
Table 5.3. Port I/O DC Electrical Characteristics
VDD = 2.7 to 3.6 V, â40 to +85 °C unless otherwise specified.
Parameter
Test Condition
Min
Typ
Max
Unit
Output High Voltage IOH = â3 mA, Port I/O push-pull VDD â 0.7
â
â
V
IOH = â10 μA, Port I/O push-pull VDD â 0.1
â
â
IOH = â10 mA, Port I/O push-pull
â
VDD â 0.8
â
Output Low Voltage
IOL = 8.5 mA
IOL = 10 μA
IOL = 25 mA
â
â
0.6
V
â
â
0.1
â
1.0
â
Input High Voltage
2.0
â
â
V
Input Low Voltage
â
â
0.8
V
Input Leakage
Current
INT2 Detection Input
Low Voltage
Weak Pullup Off
Weak Pullup On, VIN = 0 V
â
â
±1
μA
â
15
50
â
â
1.0
V
INT2 Detection Input
High Voltage
3.0
â
â
V
Table 5.4. Reset Electrical Characteristics
â40 to +85 °C unless otherwise specified.
Parameter
Test Condition
Min
Typ
Max
Unit
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
IOL = 8.5 mA,
VDD = 2.7 V to 3.6 V
RST = 0.0 V
â
â
0.6
V
0.7 x VDD â
â
V
â
â 0.3 x VDD V
â
15
40
μA
VDD Monitor Threshold (VRST)
2.60
2.65
2.70
V
Missing Clock Detector Time- Time from last system clock
80
580
800
μs
out
rising edge to reset initiation
Reset Time Delay
Delay between release of any
â
reset source and code
execution at location 0x0000
â
250
μs
Minimum RST Low Time to
Generate a System Reset
15
â
â
μs
VDD Monitor Turn-on Time
VDD Monitor Supply Current
â
â
100
μs
â
15
50
μA
36
Rev. 1.1
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