C8051F388 Datasheet, PDF (114/285 Pages) –

C8051F388/9/A/B
Interrupt Source
Table 16.1. Interrupt Summary
Interrupt Priority
Vector Order
Pending Flag
Enable Priority
Flag Control
Reset
External Interrupt 0
(INT0)
Timer 0 Overflow
External Interrupt 1
(INT1)
Timer 1 Overflow
UART0
Timer 2 Overflow
SPI0
0x0000
0x0003
0x000B
0x0013
0x001B
0x0023
0x002B
0x0033
SMB0
0x003B
Reserved
ADC0 Window Com-
pare
ADC0 Conversion
Complete
Programmable
Counter Array
Comparator0
0x0043
0x004B
0x0053
0x005B
0x0063
Comparator1
0x006B
Timer 3 Overflow
0x0073
INT2 Level
0x007B
UART1
0x0083
Reserved
SMB1
0x008B
0x0093
Timer 4 Overflow
0x009B
Timer 5 Overflow
0x00A3
Top None
0 IE0 (TCON.1)
N/A N/A Always Always
Enabled Highest
Y Y EX0 (IE.0) PX0 (IP.0)
1 TF0 (TCON.5)
2 IE1 (TCON.3)
Y Y ET0 (IE.1) PT0 (IP.1)
Y Y EX1 (IE.2) PX1 (IP.2)
3 TF1 (TCON.7)
Y Y ET1 (IE.3) PT1 (IP.3)
4 RI0 (SCON0.0)
Y N ES0 (IE.4) PS0 (IP.4)
TI0 (SCON0.1)
5 TF2H (TMR2CN.7)
Y N ET2 (IE.5) PT2 (IP.5)
TF2L (TMR2CN.6)
6 SPIF (SPI0CN.7)
Y N ESPI0 PSPI0
WCOL (SPI0CN.6)
(IE.6)
(IP.6)
MODF (SPI0CN.5)
RXOVRN (SPI0CN.4)
7 SI (SMB0CN.0)
Y N ESMB0 PSMB0
(EIE1.0) (EIP1.0)
8 N/A
N/A N/A N/A
N/A
9 AD0WINT
Y N EWADC0 PWADC0
(ADC0CN.3)
(EIE1.2) (EIP1.2)
10 AD0INT (ADC0CN.5) Y N EADC0 PADC0
(EIE1.3) (EIP1.3)
11 CF (PCA0CN.7)
Y N EPCA0 PPCA0
CCFn (PCA0CN.n)
(EIE1.4) (EIP1.4)
12 CP0FIF (CPT0CN.4) N N ECP0
PCP0
CP0RIF (CPT0CN.5)
(EIE1.5) (EIP1.5)
13 CP1FIF (CPT1CN.4) N N ECP1
PCP1
CP1RIF (CPT1CN.5)
(EIE1.6) (EIP1.6)
14 TF3H (TMR3CN.7)
NN
ET3
PT3
TF3L (TMR3CN.6)
(EIE1.7) (EIP1.7)
15 N/A
N/A N/A EINT2 PINT2
(EIE2.0) (EIP2.0)
16 RI1 (SCON1.0)
NN
ES1
PS1
TI1 (SCON1.1)
(EIE2.1) (EIP2.1)
17 N/A
N/A N/A N/A
N/A
18 SI (SMB1CN.0)
Y N ESMB1 PSMB1
(EIE2.3) (EIP2.3)
19 TF4H (TMR4CN.7)
NN
ET4
PT4
TF4L (TMR4CN.6)
(EIE2.4) (E!P2.4)
20 TF5H (TMR5CN.7)
YN
ET5
PT5
TF5L (TMR5CN.6)
(EIE2.5) (E!P2.5)
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Rev. 1.1