C8051F388 Datasheet, PDF (139/285 Pages) –

C8051F388/9/A/B
19.2. Programmable Internal High-Frequency (H-F) Oscillator
All C8051F388/9/A/B devices include a programmable internal high-frequency oscillator that defaults as
the system clock after a system reset. The internal oscillator period can be adjusted via the OSCICL regis-
ter as defined by SFR Definition 19.2.
On C8051F388/9/A/B devices, OSCICL is factory calibrated to obtain a 48 MHz base frequency. Note that
the system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8 after a
divide by 4 stage, as defined by the IFCN bits in register OSCICN. The divide value defaults to 8 following
a reset, which results in a 1.5 MHz system clock.
19.2.1. Internal Oscillator Suspend Mode
When software writes a logic 1 to SUSPEND (OSCICN.5), the internal oscillator is suspended. If the sys-
tem clock is derived from the internal oscillator, the input clock to the peripheral or CIP-51 will be stopped
until a rising or falling edge occurs on the INT2 pin.
When one of the oscillator awakening events occur, the internal oscillator, CIP-51, and affected peripherals
resume normal operation. The CPU resumes execution at the instruction following the write to the SUS-
PEND bit.
Note: The prefetch engine can be turned off in suspend mode to save power. Additionally, both Voltage
Regulators (REG0 and REG1) have low-power modes for additional power savings in suspend mode.
SFR Definition 19.2. OSCICL: Internal H-F Oscillator Calibration
Bit
7
6
5
4
3
2
1
0
Name
OSCICL[6:0]
Type
R
R/W
Reset
0
Varies
Varies
Varies
Varies
Varies
Varies
Varies
SFR Address = 0xB3; SFR Page = All Pages
Bit Name
Function
7 Unused Read = 0; Write = don’t care
6:0 OSCICL[6:0] Internal Oscillator Calibration Bits.
These bits determine the internal oscillator period. When set to 0000000b, the H-F
oscillator operates at its fastest setting. When set to 1111111b, the H-F oscillator
operates at its slowest setting. The reset value is factory calibrated to generate an
internal oscillator frequency of 48 MHz. OSCICL should only be changed by firm-
ware when the H-F oscillator is disabled (IOSCEN = 0).
Rev. 1.1
139