SI5328 Datasheet, PDF (23/70 Pages) Silicon Laboratories – ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER

6. Register Descriptions
Si5328
Register 0.
Bit D7
D6
D5
D4
D3
D2
D1
D0
Name
FREE_RUN CKOUT_ALWAYS_ON
BYPASS_REG
Type R
R/W
R/W
R
R
R
R/W
R
Reset value = 0001 0100
Bit
Name
Function
7
Reserved
Reserved.
6
FREE_RUN
Free Run.
Internal to the device, route XA/XB to CKIN2. This allows the device to lock to
its XA-XB reference.
0: Disable
1: Enable
5 CKOUT_ALWAYS_ON CKOUT Always On.
This will bypass the SQ_ICAL function. Output will be available even if SQ_I-
CAL is on and ICAL is not complete or successful. See Table 9 on page 20.
0: Squelch output until part is calibrated (ICAL).
1: Provide an output. Note: The frequency may be significantly off and variable
until the part is calibrated.
4:2
Reserved
Reserved.
1
BYPASS_REG
Bypass Register.
This bit enables or disables the PLL bypass mode. Use only when the device is
in digital hold or before the first ICAL.
0: Normal operation
1: Bypass mode. Selected input clock is connected to CKOUT buffers, bypass-
ing the PLL. Bypass mode does not support CMOS clock outputs.
0
Reserved
Reserved.
Rev. 1.0
23