SI5328 Datasheet, PDF (22/70 Pages) Silicon Laboratories – ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER

Si5328
Register
D7
D6
D5
35
36
40
N2_HS[2:0]
41
42
43
44
45
46
47
48
55
128
129
130
DIGHOLDVALID
131
132
134
135
PARTNUM_RO[3:0]
136 RST_REG
ICAL
137
D4
D3
NC2_LS[15:8]
NC2_LS[7:0]
N2_LS[15:8]
N2_LS[7:0]
N31[15:8]
N31[7:0]
N32[15:8]
N32[7:0]
CLKIN2RATE[2:0]
FOS2_FLG
PARTNUM_RO[11:4]
138
139
LOS2_EN[0:0]
LOS1_EN[0:0]
142
INDEPENDENTSKEW1[7:0]
143
INDEPENDENTSKEW2[7:0]
D2
D1
D0
N2_LS[19:16]
N31[18:16]
N32[18:16]
LOS2_INT
FOS2_INT
LOS2_FLG
FOS1_FLG
CLKIN1RATE[2:0]
CK2_ACTV_REG CK1_ACTV_REG
LOS1_INT
LOSX_INT
FOS1_INT
LOL_INT
LOS1_FLG
LOSX_FLG
LOL_FLG
REVID_RO[3:0]
GRADE_RO[1:0]
FASTLOCK
LOS2_EN [1:1]
FOS2_EN
LOS1_EN [1:1]
FOS1_EN
22
Rev. 1.0