SI5328 Datasheet, PDF (2/70 Pages) Silicon Laboratories – ITU-T G.8262 SYNCHRONOUS ETHERNET JITTER-ATTENUATING CLOCK MULTIPLIER

Si5328
Functional Block Diagram
TCXO or Refclock
CKIN1
CKIN2
Loss of Signal/
Frequency Offset
Loss of Lock
÷ N31
÷ N32
Refclock
Hitless Switching
Mux
DSPLL^®
÷ N2
÷ N1_HS
÷ N1_LS
÷ N2_LS
Signal Detect
Control
I²C/SPI Port
Device Interrupt
Rate Select
Clock Select
CKOUT1
CKOUT2
VDD (2.5 or 3.3 V)
GND
2
Rev. 1.0