4509 Datasheet, PDF (99/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4509 Group
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
TAB1 (Transfer data to Accumulator and register B from timer 1)
Instruction
code
D9
D0
Number of
1001110000
270
2
16
words
1
Number of
cycles
1
Flag CY
–
Skip condition
–
Operation:
(B) ← (T17–T14)
(A) ← (T13–T10)
Grouping: Timer operation
Description: Transfers the high-order 4 bits (T17–T14) of
timer 1 to register B.
Transfers the low-order 4 bits (T13–T10) of
timer 1 to register A.
TAB2 (Transfer data to Accumulator and register B from timer 2)
Instruction
code
D9
D0
Number of
1001110001
271
2
16
words
1
Number of
cycles
1
Flag CY
–
Skip condition
–
Operation:
(B) ← (T27–T24)
(A) ← (T23–T20)
Grouping: Timer operation
Description: Transfers the high-order 4 bits (T27–T24) of
timer 2 to register B.
Transfers the low-order 4 bits (T23–T20) of
timer 2 to register A.
TABAD (Transfer data to Accumulator and register B from register AD)
Instruction
code
D9
D0
Number of
1001111001
279
2
16
words
1
Number of
cycles
1
Flag CY
–
Skip condition
–
Operation: In A/D conversion mode (Q13 = 0),
(B) ← (AD9–AD6)
Grouping: A/D conversion operation
Description: In the A/D conversion mode (Q13 = 0), trans-
(A) ← (AD5–AD2)
In comparator mode (Q13 = 1),
(B) ← (AD7–AD4)
(A) ← (AD3–AD0)
(Q13 : bit 3 of A/D control register Q1)
fers the high-order 4 bits (AD9–AD6) of register
AD to register B, and the middle-order 4 bits
(AD5–AD2) of register AD to register A. In the
comparator mode (Q13 = 1), transfers the high-
order 4 bits (AD7–AD4) of comparator register
to register B, and the low-order 4 bits (AD3–
AD0) of comparator register to register A.
TABE (Transfer data to Accumulator and register B from register E)
Instruction
code
D9
D0
Number of Number of Flag CY
0000101010
02A
words
cycles
2
16
1
1
–
Skip condition
–
Operation:
(B) ← (E7–E4)
(A) ← (E3–E0)
Grouping: Register to register transfer
Description: Transfers the high-order 4 bits (E7–E4) of
register E to register B, and low-order 4 bits
of register E to register A.
Rev.1.02 2006.12.22 page 99 of 140
REJ03B0147-0102