4509 Datasheet, PDF (63/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4509 Group
LIST OF PRECAUTIONS
➀Noise and latch-up prevention
Connect a capacitor on the following condition to prevent noise
and latch-up;
• connect a bypass capacitor (approx. 0.1 µF) between pins VDD
and VSS at the shortest distance,
• equalize its wiring in width and length, and
• use relatively thick wire.
CNVSS pin is also used as VPP pin. Accordingly, when using this
pin, connect this pin to VSS through a resistor about 5 kΩ (connect
this resistor to CNVSS/VPP pin as close as possible).
➁Note on Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and may
perform unstable operation.
In a system where the power source voltage drops slowly when the
power source voltage drops or the power supply is turned off, reset
a microcomputer when the supply voltage is less than the recom-
mended operating conditions and design a system not to cause
errors to the system by this unstable operation.
➂Register initial values 1
The initial value of the following registers are undefined after sys-
tem is released from reset. After system is released from reset, set
initial values.
• Register Z (2 bits)
• Register D (3 bits)
• Register E (8 bits)
➃Register initial values 2
The initial value of the following registers are undefined at RAM
back-up. After system is returned from RAM back-up, set initial val-
ues.
• Register Z (2 bits)
• Register X (4 bits)
• Register Y (4 bits)
• Register D (3 bits)
• Register E (8 bits)
➄Program counter
Make sure that the PCH does not specify after the last page of the
built-in ROM.
➆ Multifunction
- The input/output of P00 can be used even when SIN is used. Be
careful when using inputs of both SIN and P00 since the input
threshold value of SIN pin is different from that of port P00.
- The input of P01 can be used even when SOUT is used.
- The input of P02 can be used even when SCK is used. Be careful
when using inputs of both SCK and P02 since the input threshold
value of SCK pin is different from that of port P02.
- The input of P11 can be used even when CNTR1 (output) is se-
lected.
The input/output of P11 can be used even when CNTR1 (input) is
selected. Be careful when using inputs of both CNTR1 and P11
since the input threshold value of CNTR1 pin is different from that
of port P11.
- The input of P12 can be used even when CNTR0 (output) is se-
lected.
The input/output of P12 can be used even when CNTR0 (input) is
selected. Be careful when using inputs of both CNTR0 and P12
since the input threshold value of CNTR0 pin is different from that
of port P12.
- The input/output of P13 can be used even when INT is used. Be
careful when using inputs of both INT and P13 since the input
threshold value of INT pin is different from that of port P13.
- The input/output of P20, P21, P30, P31, D2, D3 can be used even
when AIN0–AIN5 are used.
➇Power-on reset (only for H version)
When the built-in power-on reset circuit is used, set the time for
the supply voltage to rise from 0 V to the minimum voltage of rec-
ommended operating conditions to 100 µs or less.
If the rising time exceeds 100 µs, connect a capacitor between the
RESET pin and Vss at the shortest distance, and input “L” level to
RESET pin until the value of supply voltage reaches the minimum
operating voltage.
➈POF instruction
When the POF instruction is executed continuously after the EPOF
instruction, system enters the RAM back-up state.
Note that system cannot enter the RAM back-up state when ex-
ecuting only the POF instruction.
Be sure to disable interrupts by executing the DI instruction before
executing the EPOF instruction and the POF instruction continu-
ously.
➅Stack registers (SKS) and stack pointer (SP)
Stack registers (SKs) are eight identical registers, so that subrou-
tines can be nested up to 8 levels. However, one of stack registers
is used respectively when using an interrupt service routine and
when executing a table reference instruction. Accordingly, be care-
ful not to over the stack when performing these operations
together.
Rev.1.02 2006.12.22 page 63 of 140
REJ03B0147-0102