4509 Datasheet, PDF (26/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4509 Group
TIMERS
The 4509 Group has the following timers.
• Programmable timer
The programmable timer has a reload register and enables the
frequency dividing ratio to be set. It is decremented from a setting
value n. When it underflows (count to n + 1), a timer interrupt re-
quest flag is set to “1,” new data is loaded from the reload register,
and count continues (auto-reload function).
• Fixed dividing frequency timer
The fixed dividing frequency timer has the fixed frequency dividing
ratio (n). An interrupt request flag is set to “1” after every n count of
a count pulse.
F F1 6
n : Counter initial value
Count starts
Reload
n
1st underflow
Reload
2nd underflow
0016
Timer interrupt ^{“1”}
request flag ^{“0”}
n+1 count
n+1 count
Time
An interrupt occurs or
a skip instruction is executed.
Fig. 21 Auto-reload function
The 4509 Group timer consists of the following circuits.
• Prescaler : 8-bit programmable timer
• Timer 1 : 8-bit programmable timer
• Timer 2 : 8-bit programmable timer
(Timers 1 and 2 have the interrupt function, respectively)
• 16-bit timer
Prescaler and timers 1 and 2 can be controlled with the timer control
registers PA, W1, W2 , W5 and W6. The 16-bit timer is a free counter
which is not controlled with the control register.
Each function is described below.
Table 9 Function related timers
Circuit
Structure
Count source
Frequency
dividing ratio
Prescaler 8-bit programmable
• Instruction clock (INSTCK) 1 to 256
binary down counter
Timer 1 8-bit programmable
• PWM2 signal (PWMOD2)
1 to 256
binary down counter
• Prescaler output (ORCLK)
(link to INT input)
• CNTR1 input
(with PWM output function) • On-chip oscillator clock (f(RING))
Timer 2 8-bit programmable
• Timer 1 underflow (T1UDF) 1 to 256
binary down counter
• Prescaler output (ORCLK)
(INT input period count • CNTR0 input
function)
• System clock (STCK)
(with PWM output function)
Watchdog 16-bit fixed dividing
timer
frequency
• Instruction clock (INSTCK) 65536
Use of output signal
• Timer 1 and 2 count sources
• Timer 2 count source
• CNTR0 output
• Timer 1 interrupt
• Timer 1 count source
• CNTR1 output
• Timer 2 interrupt
• System reset (counting twice)
• Decision of flag WDF1
Control
register
PA
W1
W5
W6
W2
W5
W6
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Rev.1.02 2006.12.22 page 26 of 140
REJ03B0147-0102