4509 Datasheet, PDF (67/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4509 Group
NOTES ON NOISE
Countermeasures against noise are described below.
The following countermeasures are effective against noise in theory,
however, it is necessary not only to take measures as follows but to
evaluate before actual use.
1. Shortest wiring length
(2) Wiring for clock input/output pins
• Make the length of wiring which is connected to clock I/O pins as
short as possible.
• Make the length of wiring across the grounding lead of a capacitor
which is connected to an oscillator and the VSS pin of a microcom-
puter as short as possible.
• Separate the VSS pattern only for oscillation from other VSS pat-
terns.
(1) Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin as
short as possible. Especially, connect a capacitor across the
RESET pin and the VSS pin with the shortest possible wiring.
<Reason>
In order to reset a microcomputer correctly, 1 machine cycle or more
of the width of a pulse input into the RESET pin is required.
If noise having a shorter pulse width than this is input to the RESET
input pin, the reset is released before the internal state of the micro-
computer is completely initialized.
This may cause a program runaway.
Noise
<Reason>
If noise enters clock I/O pins, clock waveforms may be deformed.
This may cause a program failure or program runaway. Also, if a po-
tential difference is caused by the noise between the VSS level of a
microcomputer and the VSS level of an oscillator, the correct clock
will not be input in the microcomputer.
Noise
XIN
XOUT
VSS
XIN
XOUT
VSS
Reset
circuit
VSS
N.G.
RESET
VSS
Reset
circuit
VSS
O.K.
Fig. 64 Wiring for the RESET pin
RESET
VSS
N.G.
O.K.
Fig. 65 Wiring for clock I/O pins
(3) Wiring to CNVSS pin
Connect CNVSS pin to a GND pattern at the shortest distance.
The GND pattern is required to be as close as possible to the GND
supplied to VSS.
In order to improve the noise reduction, to connect a 5 kΩ resistor
serially to the CNVSS pin - GND line may be valid.
As well as the above-mentioned, in this case, connect to a GND pat-
tern at the shortest distance. The GND pattern is required to be as
close as possible to the GND supplied to VSS.
<Reason>
The CNVSS pin of the QzROM is the power source input pin for the
built-in QzROM. When programming in the built-in QzROM, the im-
pedance of the CNVSS pin is low to allow the electric current for
writing flow into the QzROM. Because of this, noise can enter easily.
If noise enters the CNVSS pin, abnormal instruction codes or data
are read from the built-in QzROM, which may cause a program run-
away.
(Note) The shortest
CNVSS
VSS
(Note)
About 5kΩ
The shortest
Note: This indicates pin.
Fig. 66 Wiring for the CNVSS pin of the QzPROM
Rev.1.02 2006.12.22 page 67 of 140
REJ03B0147-0102