4509 Datasheet, PDF (134/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4509 Group
Recommended operating conditions 2
(Ta = –20 °C to 85 °C, VDD = 1.8 to 5.5 V, unless otherwise noted)
Symbol
Parameter
Conditions
Limits
Unit
Min.
Typ.
Max.
f(XIN)
Oscillation frequency
(with a ceramic resonator)
Through mode
VDD = 4.0 V to 5.5 V
VDD = 2.7 V to 5.5 V
6 MHz
4.4
VDD = 2.0 V to 5.5 V
2.2
VDD = 1.8 V to 5.5 V
1.1
Internal frequency divided VDD = 2.7 V to 5.5 V
6
by 2
VDD = 2.0 V to 5.5 V
4.4
f(XIN)
Oscillation frequency
(with RC oscillation) (Note 1)
Internal frequency divided
by 4, 8
VDD = 2.7 V to 5.5 V
VDD = 1.8 V to 5.5 V
VDD = 2.0 V to 5.5 V
VDD = 1.8 V to 5.5 V
2.2
6
4.4
4.4 MHz
f(XIN)
Oscillation frequency
(with a ceramic oscillation selected,
external clock input)
Through mode
VDD = 4.0 V to 5.5 V
VDD = 2.7 V to 5.5 V
VDD = 2.0 V to 5.5 V
4.8 MHz
3.2
1.6
VDD = 1.8 V to 5.5 V
0.8
Internal frequency divided VDD = 2.7 V to 5.5 V
4.8
by 2
VDD = 2.0 V to 5.5 V
3.2
VDD = 1.8 V to 5.5 V
1.6
Internal frequency divided VDD = 2.0 V to 5.5 V
4.8
f(CNTR) Timer external input frequency
tw(CNTR) Timer external input period
by 4, 8
CNTR0, CNTR1
CNTR0, CNTR1
VDD = 1.8 V to 5.5 V
3/f(STCK)
3.2
f(STCK)/6 Hz
s
(“H” and “L” pulse width)
f(SCK) Serial interface external input period SCK
tw(SCK) Serial interface external input period SCK
3/f(STCK)
f(STCK)/6 Hz
s
TPON
(“H” and “L” pulse width)
Power-on reset circuit
VDD = 0 → 1.8 V
100 µs
valid supply voltage rising time (Note 2)
Notes 1: The frequency at RC oscillation is affected by a capacitor, a resistor and a microcomputer. So, set the constants within the range of the frequency limits.
2: If the rising time exceeds the maximum rating value, connect a capacitor between the RESET pin and Vss at the shortest distance, and input “L” level
to RESET pin until the value of supply voltage reaches the minimum operating voltage.
When ceramic resonator is used
f(STCK)
[MHz]
6
4.4
When RC oscillation is used
f(STCK)
[MHz]
4.4
When external clock is used
f(STCK)
[MHz]
4.8
3.2
2.2
1.1
Recommended
operating condition
1.8 2
2.7
4
5.5 _VDD
[V]
Recommended
operating condition
2.7
5.5 _VDD
[V]
1.6
Recommended
0.8
operating condition
1.8 2
2.7
4
5.5 _VDD
[V]
System clock (STCK) operating condition map
Rev.1.02 2006.12.22 page 134 of 140
REJ03B0147-0102