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4509 Datasheet, PDF (100/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER | |||
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4509 Group
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
TABP p (Transfer data to Accumulator and register B from Program memory in page p)
Instruction
code
D9
D0
Number of Number of Flag CY
0
0
1
0
0
p4 p3 p2 p1 p0 2 0
8
+p
p
16
words
1
cycles
3
â
Skip condition
â
Operation:
(SP) â (SP) + 1
(SK(SP)) â (PC)
(PCH) â p
(PCL) â (DR2âDR0, A3âA0)
(B) â (ROM(PC))7â4
(A) â (ROM(PC))3â0
(UPTF) â 1
(DR1, DR0) â (ROM(PC))9, 8
(DR2) â 0
(PC) â (SK(SP))
(SP) â (SP) â 1
Grouping: Arithmetic operation
Description: Transfers bits 7 to 4 to register B and bits 3 to 0 to register A. These bits 7
to 0 are the ROM pattern in address (DR2 DR1 DR0 A3 A2 A1 A0)2 specified
by registers A and D in page p. When UPTF is 1, Transfers bits 9, 8 to the
low-order 2 bits (DR1, DR0) of register D, and â0â is stored to the least
significant bit (DR2) of register D.
When this instruction is executed, 1 stage of stack register (SK) is used.
Note:
p is 0 to 31.
When this instruction is executed, be careful not to over the stack be-
cause 1 stage of stack register is used.
TABPS (Transfer data to Accumulator and register B from Pre-Scaler)
Instruction
code
D9
D0
Number of Number of Flag CY
1001110101
275
words
cycles
2
16
1
1
â
Skip condition
â
Operation:
(B) â (TPS7âTPS4)
(A) â (TPS3âTPS0)
Grouping: Timer operation
Description: Transfers the high-order 4 bits of prescaler
to register B.
Transfers the low-order 4 bits of prescaler to
register A.
TABSI (Transfer data to Accumulator and register B from register SI)
Instruction
code
D9
D0
Number of
1001111000
278
2
16
words
1
Number of
cycles
1
Flag CY
â
Skip condition
â
Operation: (B) â (SI7âSI4) (A) â (SI3âSI0)
Grouping: Serial interface operation
Description: Transfers the high-order 4 bits of serial inter-
face register SI to register B, and transfers
the low-order 4 bits of serial interface regis-
ter SI to register A.
TAD (Transfer data to Accumulator from register D)
Instruction
code
D9
D0
Number of Number of Flag CY
0001010001
051
words
cycles
2
16
1
1
â
Skip condition
â
Operation:
(A2âA0) â (DR2âDR0)
(A3) â 0
Grouping: Register to register transfer
Description: Transfers the contents of register D to the
low-order 3 bits (A2âA0) of register A.
Note:
When this instruction is executed, â0â is
stored to the bit 3 (A3) of register A.
Rev.1.02 2006.12.22 page 100 of 140
REJ03B0147-0102
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