4509 Datasheet, PDF (50/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4509 Group
VOLTAGE DROP DETECTION CIRCUIT
(only for H version)
The built-in voltage drop detection circuit is designed to detect a
drop in voltage and to reset the microcomputer by outputting “L”
level to RESET pin if the supply voltage drops below a set value.
(1) SVDE instruction
If the SVDE instruction is not executed (initial state), the voltage
drop detection circuit becomes invalid at RAM back-up mode.
When the SVDE instruction is executed, the voltage drop deteciton
circuit is valid even after system enters into the RAM back-up mode.
The SVDE instruction can be executed only once.
In order to release the execution of the SVDE instruction, the system
reset is required.
S
QR
EPOF instruction +POF instruction
Internal reset signal
Key-on wakeup signa
QS
R
SVDE instruction
Internal reset signal
–
VRST +
Voltage drop detection circuit
Fig. 44 Voltage drop detection reset circuit
VDD
VRST+(reset release voltage)
VRST ^-(reset occurrence voltage)
Voltage drop detection circuit
Reset signal
RESET pin
Voltage drop detection circuit
Reset signal
Microcomputer starts operation after
on-chip oscillator (internal oscillator)
clock is counted 120 to 144 times.
Note: Detection voltage hysteresis of voltage drop detection circuit is 0.2 V (Typ).
Fig. 45 Voltage drop detection circuit operation waveform
Table 18 Voltage drop detection circuit operation state
At CPU operating At RAM back-up mode
SVDE instruction not executed
Valid
Invalid
SVDE instruction executed
Valid
Valid
Rev.1.02 2006.12.22 page 50 of 140
REJ03B0147-0102