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4509 Datasheet, PDF (123/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
4509 Group
Skip condition
Datailed description
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V10 = 0: (EXF0) = 1
(INT) = “L”
However, I12 = 0
(INT) = “H”
However, I12 = 1
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– Clears (0) to interrupt enable flag INTE, and disables the interrupt.
– Sets (1) to interrupt enable flag INTE, and enables the interrupt.
– When V10 = 0 : Clears (0) to the EXF0 flag and skips the next instruction when external 0 interrupt request
flag EXF0 is “1.” When the EXF0 flag is “0,” executes the next instruction.
When V10 = 1 : This instruction is equivalent to the NOP instruction. (V10: bit 0 of interrupt control register
V1)
– When I12 = 0 : Skips the next instruction when the level of INT pin is “L.” Executes the next instruction when
the level of INT pin is “H.”
When I12 = 1 : Skips the next instruction when the level of INT pin is “H.” Executes the next instruction when
the level of INT pin is “L.” (I12: bit 2 of interrupt control register I1)
– Transfers the contents of interrupt control register V1 to register A.
– Transfers the contents of register A to interrupt control register V1.
– Transfers the contents of interrupt control register V2 to register A.
– Transfers the contents of register A to interrupt control register V2.
– Transfers the contents of interrupt control register I1 to register A.
– Transfers the contents of register A to interrupt control register I1.
– Transfers the contents of register A to timer control register PA.
– Transfers the contents of timer control register W1 to register A.
– Transfers the contents of register A to timer control register W1.
– Transfers the contents of timer control register W2 to register A.
– Transfers the contents of register A to timer control register W2.
– Transfers the contents of timer control register W5 to register A.
– Transfers the contents of register A to timer control register W5.
– Transfers the contents of timer control register W6 to register A.
– Transfers the contents of register A to timer control register W6.
– Transfers the high-order 4 bits of prescaler to register B.
Transfers the low-order 4 bits of prescaler to register A.
– Transfers the contents of register B to the high-order 4 bits of prescaler and prescaler reload register RPS.
Transfers the contents of register A to the low-order 4 bits of prescaler and prescaler reload register RPS.
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– Transfers the high-order 4 bits (T17–T14) of timer 1 to register B.
Transfers the low-order 4 bits (T13–T10) of timer 1 to register A.
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– Transfers the contents of register B to the high-order 4 bits of timer 1 and timer 1 reload register R1L.
Transfers the contents of register A to the low-order 4 bits of timer 1 and timer 1 reload register R1L.
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– Transfers the contents of register B to the high-order 4 bits of timer 1 reload register R1H. Transfers the
contents of register A to the low-order 4 bits of timer 1 reload register R1H.
Rev.1.02 2006.12.22 page 123 of 140
REJ03B0147-0102