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4509 Datasheet, PDF (44/142 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
4509 Group
At transmit (D7–D0: transfer data)
SIN pin
At receive
SOUT pin
Serial interface register (SI) SOUT pin
D7 D6 D5 D4 D3 D2 D1 D0
SIN pin
Serial interface register (SI)
* ** * * ** *
D7 D6 D5 D4 D3 D2 D1 D0
* D7 D6 D5 D4 D3 D2 D1
* * D7 D6 D5 D4 D3 D2
* ** * * ** *
Transfer data set * * * * * * * *
Transfer start
D0 * * * * * * *
D1 D0 * * * * * *
Transfer complete D7 D6 D5 D4 D3 D2 D1 D0
Fig. 37 Serial interface register state when transferring
(1) Serial interface register SI
Serial interface register SI is the 8-bit data transfer serial/parallel
conversion register. Data can be set to register SI through registers
A and B with the TSIAB instruction. The contents of register A is
transmitted to the low-order 4 bits of register SI, and the contents
of register B is transmitted to the high-order 4 bits of register SI.
During transmission, each bit data is transmitted LSB first from the
lowermost bit (bit 0) of register SI, and during reception, each bit
data is received LSB first to register SI starting from the topmost bit
(bit 7).
When register SI is used as a work register without using serial in-
terface, do not select the SCK pin.
(2) Serial interface transmit/receive
completion flag (SIOF)
Serial interface transmit/receive completion flag (SIOF) is set to “1”
when serial data transmission or reception completes. The state of
SIOF flag can be examined with the skip instruction (SNZSI). Use
the interrupt control register V2 to select the interrupt or the skip
instruction.
The SIOF flag is cleared to “0” when the interrupt occurs or when
the next instruction is skipped with the skip instruction.
(3) Serial interface start instruction (SST)
When the SST instruction is executed, the SIOF flag is cleared to
“0” and then serial interface transmission/reception is started.
(4) Serial interface control register J1
Register J1 controls the synchronous clock, P02/SCK, P01/SOUT
and P00/SIN pin function. Set the contents of this register through
register A with the TJ1A instruction. The TAJ1 instruction can be
used to transfer the contents of register J1 to register A.
Rev.1.02 2006.12.22 page 44 of 140
REJ03B0147-0102