PT7A6632 Datasheet, PDF (9/61 Pages) Pericom Semiconductor Corporation – PT7A6632 32-Channel HDLC Controller

Data Sheet
PT7A6632 32-Channel HDLC Controller
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Functional Description
deformats them and adapts data rate, then stores the data into
the external memory.
General Description
The PT7A6632 HDLC Controller is applied between an exter-
nal memory and T1/E1 trunk interface to perform data trans-
mission and reception. See Figure 1. Its signal attributes are
shown in Figure 4.
PT7A6632 reads the data to be transmitted from the external
memory in 8-bit parallel way, formats them and adapts data
rate, then transmits the data to the T1/E1 trunk interface.
PT7A6632 receives serial data from the T1/E1 trunk interface,
The channel operation modes are set up in the external memory
by CPU. PT7A6632 reads the commands from the external
memory and process data channel by channel, totally 64 chan-
nels (32 for transmission and 32 for receive). Each channel
mode can be set up in external memory independently by CPU.
PT7A6632 consists of 4 functional blocks as shown in Figure
2. There are:
• Transmit Bit-Level Processor,
• Receive Bit-Level Processor,
• Memory Manager, and
• State/Control Machine.
Figure 4. PT7A6632 Interface Signals
External
Memory
CPU
16
A0-A15
8
D0-D7
READ
WRITE
AS
DMND
ATTN
ATACK
SYSACC
INTR
PT7A6632
SYSCLK
RSER
RSYNC
RRED
RCLK
TCLK
TSER
TMAX
TSEREN
5
CH0-CH4
Rx/Tx
T1/E1
Trunk
Interface
Channel
Status
Output
2
RESET UAEN MDFS HCS0-HCS1 T1/CEPT SIS
Device Mode
PT019(05/02)
9
Ver:2