PT7A6632 Datasheet, PDF (40/61 Pages) Pericom Semiconductor Corporation – PT7A6632 32-Channel HDLC Controller

Data Sheet
PT7A6632 32-Channel HDLC Controller
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Figure 30. Typical Linked Buffer Receive Activity
xx00
Activation
Memory
xxC0
xxC1
xxC2
xxC3
Rx CH0
Rx CH1
1: ATTN goes high.
2: PT7A6632 accesses Activation Memory (xx00).
3: PT7A6632 reads the first buffer s starting address (command
or data), then sets ATACK, & starts processing that buffer.
4: PT7A6632 resets ATACK after ATTN goes low.
xxFE
xxFF
Rx CH31
5: PT7A6632 continues processing command or data buffers as
controlled by the status of each.
Next BF Addr.
Command
Modes
FILL/MASK
Command Buffer
Next BF Addr.
Size
Length
MPTY=1
Data Buffer #1
Data Processing Memory
Next BF Addr.
Size
Length
MPTY=1
Data Buffer #2
PT019(05/02)
40
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