PT7A6632 Datasheet, PDF (28/61 Pages) Pericom Semiconductor Corporation – PT7A6632 32-Channel HDLC Controller

Data Sheet
PT7A6632 32-Channel HDLC Controller
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
• MODE Byte (Channel Mode)
The MODE byte is set up by the CPU to specify channel modes of HDLC, non-HDLC signaling, non-HDLC data, loop, non-
loop, inversion or non-inversion.
The details are shown in Table 8.
Table 8. MODE Byte in Transmit Command Buffer
MODE
Name
Descr iption
Bits 7 - 4
Not used
1 Invertion
Bit 3
INV
0 Non-invertion
1 Loop channel
Bit 2
LOOP
0 Non-loop channel
Non-HDLC data channel mode: used in modes 0 and 1 of DMI application. CF/P should be reset
00 to get uninterrupted data transmission, otherwise the 6632 will transmit all-one byte repeatedly
following the last byte in the buffer. The channel time fill and the idle codes are the same.
HDLC data channel mode: The channel is an HDLC channel or an LAPD message-oriented
01 channel. Information field is in integral bytes, 16-bit CRC-CCITT polynomial is used to calculate
Bit 1, Bit 0 SIG, HDLC
FCS, and ABORT sequence satisfies SDLC and HDLC requirements.
Non-HDLC signaling channel mode: The channel carries bit-oriented signaling data. 6632
10 assumes that no more than 2 linked data buffers are allocated to the signaling channel by the CPU.
The last data buffer (even if it is the only buffer) is assumed to be a recirculating buffer.
11 Reserved
PT019(05/02)
28
Ver:2