PT7A6632 Datasheet, PDF (20/61 Pages) Pericom Semiconductor Corporation – PT7A6632 32-Channel HDLC Controller

Data Sheet
PT7A6632 32-Channel HDLC Controller
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External Memory Organization and
Definition
General Structure
and Channel Buffer Pointers, providing PT7A6632 such in-
formation as channel activation/deactivation, channel direc-
tion (transmit or receive) and channel starting addresses. CPU
allocates the Channel Starting Pointer for each receive and
transmit channel.
The external memory is divided by the CPU into two func-
tional blocks for channel activation and data processing, re-
ferred as Activation Memory and Data Processing Memory.
The Activation Memory contains Channel Activation Byte
The Data Processing Memory contains data/command buffers
storing descriptors, user’s data received or to be transmitted,
channel operation mode and status. CPU allocates a set of
linked data/command buffers for each receive and transmit
channel.
Figure 20. External Memory Map - Top Level
Details are shown in Figures 20-22.
External Memory
(Address)
(Contents)
0
1
2
~~
~~
j
Channel Activation Byte
~~
~~
j + 128
to
j + 255
128 Bytes of System Memory
for Channel Buffer Pointers
~~
~~
p
p+1
to
p+n 1
n-Byte Data Buffer
For Tx Channel #m
~~
~~
x
x+1
to
x+n-1
n-Byte Data Buffer
For Rx Channel #k
Activation
Memory
Data
Processing
Memory
PT019(05/02)
20
Ver:2