PT7A6632 Datasheet, PDF (7/61 Pages) Pericom Semiconductor Corporation – PT7A6632 32-Channel HDLC Controller

Data Sheet
PT7A6632 32-Channel HDLC Controller
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Table 2. Pin Description (Continued)
Pin
Name
Type
Descr iption
16
SYSCLK
I ^{System clock: Provides timing reference for all external memory interface. Frequency =}
3.088MHz for T1 or 4.096MHz for CEPT PCM-30.
17
TSER
O ^{Transmitted serial data: Serial data output line, tri-state output to T1/E1 interface, carries}
transmitter data bit stream.
18, 52
19, 20, 53,
54, 55, 61,
62
21-28
V_CC
GND
D0-D7
29-42, 44-45 A0-A15
46
UAEN
47
MDFS
48
DMND
49
ATACK
50
READ
I Power supply (+5V)
I Ground
I/O
Memor y Data lines: Bidirectional data bus between the PT7A6632 and the shared
memory. D0 is the LSB and D7 is the MSB.
O
Memory Address lines: Output address lines to the external memory. A0 is the LSB and
A15 is the MSB.
Upper Address Enable: Sets the upper address bus lines (A8-A15) state:
I ^{UAEN = 1: PT7A6632 sets A8-A15 in high impedance during Activation Memory access}
with SYSACC asserted.
UAEN = 0: PT7A6632 sets A8-A15 LOW when SYSACC asserted.
Memory Data Format Select:
MDFS = 1: the most significant bytes of next buffer start address, buffer size and data
length are at even addresses respectively in the external memory, and their
I
least significant bytes at odd addresses (68000MPU).
MDFS = 0: inverse with the above, i.e., the most significant bytes of next buffer start
address, buffer size and data length are at odd addresses respectively in the
external memory, and their least significant bytes at even addresses (8080
MPU).
Memory Demand: A HIGH informs other devices on the memory bus that the PT7A6632
O will access the external memory one TCLK period after DMND assertion (rising edge).
The DMND will be deasserted at completion of the memory access.
Attention Acknowledge: Active HIGH. 6632 responds to the ATTN to access Activation
O Memory. After completion of the access, 6632 asserts ATACK. ATACK is deasserted in
response to deassertion of ATTN (falling edge).
O ^{Memory Read: Active LOW. Output to the external memory for data reading. When it}
is LOW, data from memory is latched to the PT7A6632 on the rising edge of SYSCLK.
51
WRITE
O Memory Write: Active LOW. Output to the external memory for data writing.
56
SYSACC
O ^{System Access: Active HIGH. A HIGH indicates the PT7A6632 is accessing Activation}
Memory locations for channel activation byte or channel buffer pointers.
PT019(05/02)
7
Ver:2