PT7A6632 Datasheet, PDF (42/61 Pages) Pericom Semiconductor Corporation – PT7A6632 32-Channel HDLC Controller

Data Sheet
PT7A6632 32-Channel HDLC Controller
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Memory Address
Activation Memory Address
Memory Address Extension
The output of CH0 - CH4 and Rx/Tx of the PT7A6632 can be
used as upper address bits to extend the 16-bit addresses to 22-
bit addresses. See an example in Figure 32. Or these six bits
can be mapped by an external lookup table to another set of n
bits (where n is specified by the CPU). Since the channel num-
ber and Rx/Tx are output by the PT7A6632 well in advance of
the 16-bit address, address translation time is not a concern.
The Activation Memory has 256 byte locations as shown in
Figure 33. The addresses can be decided by the CPU by setting
UAEN and SYSACC output of the PT7A6632. When UAEN =
0, the address output lines A8-A15 of the PT7A6632 is set low,
so the address of the Activation Memory is in 00xx(H). When
UAEN = 1, PT7A6632 sets its outputs of A8-A15 in high im-
pedance and the CPU can drive the addresses A8-A15.
Figure 32. Address Extension
External
Memory
16
A15-A0
5
A20-A16
1
A21
PT7A6632
A15-A0
CH0 - CH4
Rx/Tx
Figure 33. Activation Memory Address
PT019(05/02)
xx00
xx80
xx81
xx82
xx83
Activation
Memory
Activat Byte
Not used
Tx CH0
Tx CH1
(Addresses xx80,
xx81 and xxB2
through xxBF are not
used in T1 modes.)
xxBE
xxBF
xxC0
xxC1
xxC2
xxC3
Tx CH31
Rx CH0
Rx CH1
xxFE
xxFF
Rx CH31
(Addresses xxC0,
xxC1 and xxF2
through xxFF are not
used in T1 mode.)
Upper address lines xx (A8-A15):
When UAEN = 0, xx = 00.
When UAEN = 1, A8 A15 output of PT7A6632 is set in
high impedance, xx are decided by the CPU.
42
Ver:2