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| JN516X Datasheet, PDF (89/94 Pages) NXP Semiconductors – IEEE802.15.4 Wireless Microcontroller | |||
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B.4 JN516x Module Reference Designs
For customers wishing to integrate the JN516x device directly into their system, NXP provide a range of Module
Reference Designs, covering standard, medium and high-power modules fitted with different Antennae
To ensure the correct performance, it is strongly recommended that where possible the design details provided by the
reference designs, are used in their exact form for all end designs, this includes component values, pad dimensions,
track layouts etc. In order to minimise all risks, it is recommended that the entire layout of the appropriate reference
module, if possible, be replicated in the end design.
For full details, see [5]. Please contact technical support.
B.4.1 Schematic Diagram
A schematic diagram of the JN516x PCB antenna reference module is shown in figure 53. Details of component
values and PCB layout constraints can be found in Table 12.
2-wire Serial Port
Timer0
Analogue IO
C10: 15pF
Y1
C11: 15pF
C15: 100nF
C2: 10nF
VDD
C13: 10µF
COMP1P
COMP1M
RESETN
XTAL_OUT
XTAL_IN
VB_SYNTH
VCOTUNE (NC)
VB_VCO
VDD1
C14: 100nF
IBIAS
C7: 100nF
40 39 38 37 36 35 34 33 32 31
1
30
2
29
3
28
4
27
VSSA
5
26
6
25
7
24
8
23
9
22
10
21
11 12 13 14 15 16 17 18 19 20
C16: 100nF
VDD2
UART0/JTAG
RXD0
TXD0
RTS0
CTS0
VB_RAM
C6: 100nF
DIO19
DIO18
DO1
VSS1
R1: 43kâ¦
C20: 100nF
VB_RF
To coaxial socket
or integrated antenna
L1: 5.1nH
L2: 3.9nH
C1: 47pF
C4: 47pF
VB_RF
C3: 100nF
SPI Select
Figure 53 JN516x PCB Antenna Module Reference Design
© NXP Laboratories UK 2013
JN-DS-JN516x v1.1 Production
89
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