JN516X Datasheet, PDF (62/94 Pages) NXP Semiconductors – IEEE802.15.4 Wireless Microcontroller

RESETN
Internal RESET
t_RST
V_RST
t_STAB
VDD = 2.0 to 3.6V, -40 to +125º C
Figure 40: Externally Applied Reset
Parameter
Min
Typ
Max
Unit
Notes
External Reset pulse width
1
to initiate reset sequence
(tRST)
µs
Assumes internal pullup
resistor value of 100K
worst case and ~5pF
external capacitance
External Reset threshold
voltage (VRST)
VDD2 x
0.7
V
Minimum voltage to
avoid being reset
Internal Power-on Reset
threshold voltage (VPOT)
Rise/fall time > 10mS
1.44
1.41
V
Rising
Falling
Spike Rejection
1.2
Square wave pulse 1us
1.3
Triangular wave pulse 10us
V
Depth of pulse to trigger
reset
Reset stabilisation time
180
(tSTAB)
µs
Note 1
Chip current when held in
6
uA
reset (IRESET)
Brown-Out Reset
Current Consumption
80
nA
Supply Voltage Monitor
1.86
1.94
2.00
Threshold Voltage (VTH)
1.92
2.00
2.06
2.02
2.10
2.16
2.11
2.20
2.27
2.21
2.30
2.37
2.30
2.40
2.47
2.59
2.70
2.78
2.88
3.00
3.09
V
Configurable threshold
with 8 levels
Supply Voltage Monitor
37
mV
Corresponding to the 8
Hysteresis (VHYS)
38
threshold levels
45
52
58
65
82
100
1 _{Time from release of reset to start of executing of bootloader code from internal flash. An extra 15us is incurred if}
the BOR circuit has been activated (e.g., if the supply voltage has been ramped up from 0V)".
62
JN-DS-JN516x v1.1 Production
© NXP Laboratories UK 2013