JN516X Datasheet, PDF (11/94 Pages) NXP Semiconductors – IEEE802.15.4 Wireless Microcontroller

32
DIO9 TIM0CAP 32KXTALIN
RXD1
32KIN
CMOS
DIO9, Timer0 Capture Input,
32K External Crystal Input,
UART 1 Receive Data Input
or 32K external clock Input
33
DIO10 TIM0OUT 32KXTALOUT
CMOS
DIO10, Timer0 PWM Output
or 32K External Crystal
Output
34
DIO11
PWM1
TXD1
CMOS
DIO11, PWM1 Output or
UART 1 Transmit Data
Output
36
DIO12
PWM2
CTS0
JTAG_TCK
ADO
SPISMO
SI
CMOS
DIO12, PWM2 Output, UART
0 Clear To Send Input, JTAG
CLK Input, Antenna Diversity
Odd Output or SPI Slave
Master Out Slave In Input
37
DIO13
PWM3
RTS0
JTAG_TMS ADE
SPISMI
SO
CMOS
DIO13, PWM3 Output, UART
0 Request To Send Output,
JTAG Mode Select Input,
Antenna Diversity Even
output or SPI Slave Master In
Slave Out Output
38
DIO14 SIF_CLK TXD0 TXD1 JTAG_TDO SPISEL SPISSE CMOS DIO14, Serial Interface
1
L
Clock, UART 0 Transmit
Data Output, UART 1
Transmit Data Output, JTAG
Data Output, SPI Master
Select Output 1 or SPI Slave
Select Input
40
DIO15
SIF_D
RXD0 RXD1 JTAG_TDI SPISEL SPISCL CMOS DIO15, Serial Interface Data,
2
K
UART 0 Receive Data Input,
UART 1 Receive Data Input,
JTAG Data Input, SPI Master
Select Output 2 or SPI Slave
Clock Input
1
DIO16 COMP1P
SIF_CLK
SPISMOSI
CMOS
DIO16, Comparator Positive
Input, Serial Interface clock
or SPI Slave Master Out
Slave In Input
2
DIO17 COMP1M
SIF_D
SPISMISO
CMOS
DIO17, Comparator Negative
Input, Serial Interface Data or
SPI Slave Master In Slave
Out Output
23
DIO18 SPIMOSI
24
DIO19 SPISEL0
20
DO0
SPICLK
22
DO1
SPIMISO
PWM2
PWM3
CMOS
CMOS
CMOS
CMOS
SPI Master Out Slave In
Output
SPI Master Select Output 0
SPI Master Clock Output or
PWM2 Output
SPI Master In Slave Out
Input or PWM3 Output

The PCB schematic and layout rules detailed in Appendix B.4
must be followed. Failure to do so will likely result in the
JN516x failing to meet the performance specification detailed
herein and worst case may result in device not functioning in
the end application.
© NXP Laboratories UK 2013
JN-DS-JN516x v1.1 Production
11