JN516X Datasheet, PDF (14/94 Pages) NXP Semiconductors – IEEE802.15.4 Wireless Microcontroller

Pu
IE
R_PU
R_PROT
I
VDD2
ADC or
COMP1 Input
R_ESD
DIO[x] Pin
VSS
VSS
O
OE
Figure 4: DIO Pin Equivalent Schematic
In reset, the digital peripherals are all off and the DIO pins are set as high-impedance inputs. During sleep and deep
sleep, the DIO pins retain both their input/output state and output level that was set as sleep commences. If the DIO
pins were enabled as inputs and the interrupts were enabled then these pins may be used to wake up the JN516x
from sleep.
14
JN-DS-JN516x v1.1 Production
© NXP Laboratories UK 2013