JN516X Datasheet, PDF (57/94 Pages) NXP Semiconductors – IEEE802.15.4 Wireless Microcontroller

18 Power Management and Sleep Modes
18.1 Operating Modes
Three operating modes are provided in the JN516x that enable the system power consumption to be controlled
carefully to maximise battery life.
• Active Processing Mode
• Sleep Mode
• Deep Sleep Mode
The variation in power consumption of the three modes is a result of having a series of power domains within the chip
that may be controllably powered on or off.
18.1.1 Power Domains
The JN516X has the following power domains:
• VDD Supply Domain: supplies the wake-up timers and controller, DIO blocks, Comparator, SVM and BOR plus
Fast RC, 32kHz RC and crystal oscillators. This domain is driven from the external supply (battery) and is
always powered. The wake-up timers and controller, and the 32kHz RC and crystal oscillators may be powered
on or off in sleep mode through software control.
• Digital Logic Domain: supplies the digital peripherals, CPU, Flash, RAM when in Active Processing Mode,
Baseband controller, Modem and Encryption processor. It is powered off during sleep mode.
• RAM Domain: supplies the RAM when in Active Processing Mode. Also supplies the Ram during sleep mode to
retain the memory contents. It may be powered on or off for sleep mode through software control.
• Radio Domain: supplies the radio interface, ADCs and temperature sensor. It is powered during transmit and
receive and when the analogue peripherals are enabled. It is controlled by the baseband processor and is
powered off during sleep mode.
The current consumption figures for the different modes of operation of the device is given in Section 19.2.2.
18.2 Active Processing Mode
Active processing mode in the JN516x is where all of the application processing takes place. By default, the CPU will
execute at the selected clock speed executing application firmware. All of the peripherals are available to the
application, as are options to actively enable or disable them to control power consumption; see specific peripheral
sections for details.
Whilst in Active processing mode there is the option to doze the CPU but keep the rest of the chip active; this is
particularly useful for radio transmit and receive operations, where the CPU operation is not required therefore saving
power.
18.2.1 CPU Doze
Whilst in doze mode, CPU operation is stopped but the chip remains powered and the digital peripherals continue to
run. Doze mode is entered through software and is terminated by any interrupt request. Once the interrupt service
routine has been executed, normal program execution resumes. Doze mode uses more power than sleep and deep
sleep modes but requires less time to restart and can therefore be used as a low power alternative to an idle loop.
Whilst in CPU doze the current associated with the CPU is not consumed, therefore the basic device current is
reduced as shown in the figures in Section 19.2.2.1.
18.3 Sleep Mode
The JN516x enters sleep mode through software control. In this mode most of the internal chip functions are
shutdown to save power, however the state of DIO pins are retained, including the output values and pull-up enables,
and this therefore preserves any interface to the outside world.
© NXP Laboratories UK 2013
JN-DS-JN516x v1.1 Production
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