JN516X Datasheet, PDF (83/94 Pages) NXP Semiconductors – IEEE802.15.4 Wireless Microcontroller

Appendix B Development Support
B.1 Crystal Oscillators
This Section covers some of the general background to crystal oscillators, to help the user make informed decisions
concerning the choice of crystal and the associated capacitors.
B.1.1 Crystal Equivalent Circuit
Cs
Lm
C1
Rm
Cm
C2
Where Cm is the motional capacitance
Lm is the motional inductance. This together with Cm defines the oscillation frequency (series)
Rm is the equivalent series resistance ( ESR ).
CS is the shunt or package capacitance and this is a parasitic
B.1.2 Crystal Load Capacitance
The crystal load capacitance is the total capacitance seen at the crystal pins, from all sources. As the load
capacitance (CL) affects the oscillation frequency by a process known as ‘pulling’, crystal manufacturers specify the
frequency for a given load capacitance only. A typical pulling coefficient is 15ppm/pF, to put this into context the
maximum frequency error in the IEEE802.15.4 specification is +/-40ppm for the transmitted signal. Therefore, it is
important for resonance at 32MHz exactly, that the specified load capacitance is provided.
The load capacitance can be calculated using:
CL = ^{CT1 × CT 2}
CT1 + CT 2
Total capacitance
CT1 = C1 + C1P + C1in
Where C1 is the capacitor component
C1P is the PCB parasitic capacitance. With the recommended layout this is about 1.6pF
C1in is the on-chip parasitic capacitance and is about 1.4pF typically.
Similarly for CT 2
Hence for a 9pF load capacitance, and a tight layout the external capacitors should be 15pF
© NXP Laboratories UK 2013
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