MC68340AB16E Datasheet, PDF (52/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
Table 3-1. SIZx Signal Encoding
SIZ1
0
1
1
0
SIZ0
1
0
1
0
Transfer Size
Byte
Word
Three Bytes
Long Word
3.1.2 Function Code Signals
FC3–FC0 are outputs that indicate one of 16 address spaces to which the address
applies. Fifteen of these spaces are designated as either user or supervisor, program or
data, and normal or direct memory access (DMA) spaces. One other address space is
designated as CPU space to allow the CPU32 to acquire specific control information not
normally associated with read or write bus cycles. FC3–FC0 are valid while AS is
asserted.
Function codes (see Table 3-2) can be considered as extensions of the 32-bit address
that can provide up to 16 different 4-Gbyte address spaces. Function codes are
automatically generated by the CPU32 to select address spaces for data and program at
both user and supervisor privilege levels, a CPU address space for processor functions,
and an alternate master address space. User programs access only their own program
and data areas to increase protection of system integrity and can be restricted from
accessing other information. The S-bit in the CPU32 status register is set for supervisor
accesses and cleared for user accesses to provide differentiation. Refer to 3.4 CPU
Space Cycles for more information.
Table 3-2. Address Space Encoding
Function Code Bits
3
2
1
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
x
x
x
Address Spaces
Reserved (Motorola)
User Data Space
User Program Space
Reserved (User )
Reserved (Motorola)
Supervisor Data Space
Supervisor Program Space
CPU Space
DMA Space
MOTOROLA
MC68340 USER’S MANUAL
3-3
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