MC68340AB16E Datasheet, PDF (250/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
5.7.3.14 SAVE AND RESTORE OPERATIONS. The save and restore operations table
indicates the number of clock periods needed for the processor to perform the specified
state save or return from exception. Complete execution times and stack length are given.
No additional tables are needed to calculate total effective execution time for these
instructions. The total number of clock cycles is outside the parentheses. The numbers
inside parentheses (r/p/w) are included in the total clock cycle number. All timing data
assumes two-clock reads and writes.
Instruction
Head
Tail
Cycles
BERR on instruction
0
−2
<58(2/2/12)
BERR on exception
0
−2
48(2/2/12)
RTE (four-word frame)
1
−2
24(4/2/0)
RTE (six-word frame)
1
−2
26(4/2/0)
RTE (BERR on instruction)
1
−2
50(12/12/Y)
RTE (BERR on four-word frame)
1
−2
66(10/2/4)
RTE (BERR on six-word frame)
1
−2
70(12/2/6)
< = Maximum time is indicated (certain data or mode combinations execute faster).
Y = If a bus error occurred during a write cycle, the cycle is rerun by the RTE.
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MC68340 USER’S MANUAL
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