MC68340AB16E Datasheet, PDF(381/441 Page) Motorola, Inc – Integrated Processor with DMA User’s Manual

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MC68340AB16E Datasheet, PDF (381/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

◁

Freescale Semiconductor, Inc.

Table 9-2. Boundary Scan Bit Definitions (Continued)

Bit

Pin/Cell

Num Cell Type Name

Pin

Type

Output

CTL Cell

Bit

Pin/Cell

Num Cell Type Name

Pin

Type

70 IO.Cell

D3

I/O

db.ctl

101 IO.Ctl0 ab31.ctl

â

71 IO.Cell

D4

I/O

db.ctl

102 IO.Cell

A0

I/O*

72 IO.Cell

D5

I/O

db.ctl

103 IO.Cell DSACK0

I/O**

73 IO.Cell

D6

I/O

db.ctl

104 IO.Cell DSACK1

I/O**

74 IO.Cell

D7

I/O

db.ctl

105 IO.Cell

RMC

I/O*

75 IO.Cell

D8

I/O

db.ctl

106 IO.Cell

R/ W

I/O*

76 IO.Cell

D9

I/O

db.ctl

107 IO.Cell

SIZ1

I/O*

77 IO.Cell

D10

I/O

db.ctl

108 IO.Cell

SIZ0

I/O*

78 IO.Cell

D11

I/O

db.ctl

109 IO.Cell

DS

I/O*

79 IO.Cell

D12

I/O

db.ctl

110 IO.Cell

AS

I/O*

80 IO.Cell

D13

I/O

db.ctl

111 I.Pin

BGACK

Input

81 IO.Cell

D14

I/O

db.ctl

112 O.Latch

BG

Output

82 IO.Cell

D15

I/O

db.ctl

113 I.Pin

BR

Input

83 IO.Ctl1

ab.ctl

â

â

114 IO.Cell

BERR

I/O**

84 IO.Ctl0 berr.ctl

â

â

115 O.Latch

HALT

OD-I/O

85 IO.Ctl1

db.ctl

â

â

116 I.Pin

HALT

OD-I/O

86 IO.Cell

A24

I/O

ab24.ctl

117 O.Latch

RESET

OD-I/O

87 IO.Ctl0 ab24.ctl

â

â

118 I.Pin

RESET

OD-I/O

88 IO.Cell

A25

I/O

ab25.ctl

119 O.Latch CLKOUT Output

89 IO.Ctl0 ab25.ctl

â

â

120 I.Pin

EXTAL

Input

90 IO.Cell

A26

I/O

ab26.ctl

121 IO.Cell MODCK

I/O

91 IO.Ctl0 ab26.ctl

â

â

122 IO.Ctl0 modck.ctl

â

92 IO.Cell

A27

I/O

ab27.ctl

123 O.Latch

IPIPE

Output

93 IO.Ctl0 ab27.ctl

â

â

124 IO.Cell IFETCH

I/O*

94 IO.Cell

A28

I/O

ab28.ctl

125 IO.Ctl0 ifetch.ctl

â

95 IO.Ctl0 ab28.ctl

â

â

126 I.Pin

BKPT

Input

96 IO.Cell

A29

I/O

ab29.ctl

127 O.Latch FREEZE Output

97 IO.Ctl0 ab29.ctl

â

â

128 I.Pin

TIN1

Input

98 IO.Cell

A30

I/O

ab30.ctl

129 O.Latch TOUT1 TS-Output

99 IO.Ctl0 ab30.ctl

â

â

130 IO.Ctl0 tout1.ctl

â

100 IO.Cell

A31

I/O

ab31.ctl

131

I.Pin

TGATE1

Input

NOTES:

The noted pins are implemented differently than defined in the signal definition description:

* Input during Motorola factory test

** Output during Motorola factory test

Output

CTL Cell

â

ab.ctl

berr.ctl

berr.ctl

ab.ctl

ab.ctl

ab.ctl

ab.ctl

ab.ctl

ab.ctl

â

â

â

berr.ctl

â

â

â

â

â

â

modck.ctl

â

â

ifetch.ctl

â

â

â

â

tout1.ctl

â

â

9-6

MC68340 USERâS MANUAL

MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

▷