MC68340AB16E Datasheet, PDF (162/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
Instruction
ASL
ASR
LSL
LSR
ROL
ROR
ROXL
ROXR
SWAP
Table 5-7. Shift and Rotate Operations
Operand
Syntax
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn, Dn
#〈data〉, Dn
〈ea〉
Dn
Operand Size
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
8, 16, 32
8, 16, 32
16
16
Operation
X/C
X/C
0
C
C
X
MSW LSW
0
X/C
0
X/C
C
X
C
5.3.3.6 BIT MANIPULATION INSTRUCTIONS. Bit manipulation operations are
accomplished using the following instructions: bit test (BTST), bit test and set (BSET), bit
test and clear (BCLR), and bit test and change (BCHG). All bit manipulation operations
can be performed on either registers or memory. The bit number is specified as immediate
data or in a data register. Register operands are 32 bits long, and memory operands are 8
bits long. Table 5-8 is a summary of bit manipulation instructions.
Instruction
BCHG
BCLR
BSET
BTST
Table 5-8. Bit Manipulation Operations
Operand
Syntax
Dn, 〈ea〉
#〈data〉, 〈 ea〉
Dn, 〈ea〉
#〈data〉, 〈 ea〉
Dn, 〈ea〉
#〈data〉, 〈 ea〉
Dn, 〈ea〉
#〈data〉, 〈 ea〉
Operand Size
8, 32
8, 32
8, 32
8, 32
8, 32
8, 32
8, 32
8, 32
Operation
~(〈bit number 〉 of destination) ⇒ Z ⇒ bit of
destination
~(〈bit number 〉 of destination) ⇒ Z; 0 ⇒ bit of
destination
~(〈bit number 〉 of destination) ⇒ Z; 1 ⇒ bit of
destination
~(〈 bit number 〉 of destination) ⇒ Z
MOTOROLA
MC68340 USER’S MANUAL
5-25
For More Information On This Product,
Go to: www.freescale.com