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MC68340AB16E Datasheet, PDF (330/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual | |||
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Freescale Semiconductor, Inc.
RxRDYBâChannel B Receiver Ready or FIFO full
1 = Enable interrupt
0 = Disable interrupt
TxRDYBâChannel B Transmitter Ready
1 = Enable interrupt
0 = Disable interrupt
Bit 3âReserved
DBAâDelta Break A
1 = Enable interrupt
0 = Disable interrupt
RxRDYAâChannel A Receiver Ready or FIFO full
1 = Enable interrupt
0 = Disable interrupt
TxRDYAâChannel A Transmitter Ready
1 = Enable interrupt
0 = Disable interrupt
7.4.1.14 INPUT PORT (IP). The IP register shows the current state of the CTSâ inputs.
This register can only be read when the serial module is enabled (i.e., the STP bit in the
MCR is cleared).
IP
$71D
7
6
5
4
3
2
1
0
0
0
0
0
0
0
CTSB CTSA
RESET:
0
0
0
0
0
0
U
U
Read Only
Supervisor/User
CTSB, CTSAâCurrent State
1 = The current state of the respective CTSâ input is negated.
0 = The current state of the respective CTSâ input is asserted.
The information contained in these bits is latched and reflects the state of the input pins
at the time that the IP is read.
NOTE
These bits have the same function and value of the IPCR bits 1
and 0.
MOTOROLA
MC68340 USERâS MANUAL
7-35
For More Information On This Product,
Go to: www.freescale.com
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