MC68340AB16E Datasheet, PDF (395/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
Additionally, the relationship between the asynchronous inputs and the clock edge, as
shown in Figure 10-11, does not change as frequency changes.
A second type of specification indicates the minimum amount of time a signal will be
asserted. This type of specification is illustrated in Figure 10-12.
T/2
N
CLKOUT
td
OUTPUT
tw
Figure 10-12. Signal Width Specifications
The method for calculating a frequency-adjusted tw is as follows:
tw' = tw + N (Tf'/2 – Tf/2) + (Tf'/2 – td)
where:
tw' = the frequency-adjusted signal width
tw = the signal width at 16.78 MHz
N = the number of full one-half clock periods in tw
Tf'/2 = one-half the new clock period
Tf/2 = one-half the clock period at full speed
td = the propagation time from the clock edge
The following calculation uses a 16.78-MHz part, specification 14, AS width asserted, at
12.5 MHz as an example:
tw = 100 ns
N=3
Tf'/2 = 80/2 = 40 ns
Tf/2 = 60/2 = 30 ns
td = 30 ns maximum
therefore:
tw' = 100 + 3(40 – 30) + (40 – 30) = 140 ns
The third type of specification used is a skew between two outputs (see Figure 10-13).
10-8
MC68340 USER’S MANUAL
MOTOROLA
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