MC68340AB16E Datasheet, PDF (154/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
Opcode
CMP2
DBcc
DIVS
DIVSL
DIVU
DIVUL
EOR
EORI
EORI
to CCR
EORI
to SR
EXG
EXT
EXTB
LLEGAL
JMP
JSR
LEA
LINK
LPSTOP
LSL,LSR
MOVE
MOVEA
MOVE from
CCR
Table 5-2. Instruction Set Summary (Continued)
Operation
Compare Rn < lower-bound or
Rn > upper-bound
and Set Condition Codes
If condition false then (Dn – 1 ⇒ Dn;
If Dn ≠ –1 then PC + d ⇒ PC)
Destination/Source ⇒ Destination
Destination/Source ⇒ Destination
Source ⊕ Destination ⇒ Destination
Immediate Data ⊕ Destination ⇒ Destination
Source ⊕ CCR ⇒ CCR
Syntax
CMP2 〈ea〉,Rn
DBcc Dn,〈 label〉
DIVS.W 〈ea〉,Dn
DIVS.L 〈 ea〉,Dq
DIVS.L 〈 ea〉,Dr:Dq
DIVSL.L 〈 ea〉,Dr:Dq
DIVU.W 〈ea〉,Dn
DIVU.L 〈ea〉,Dq
DIVU.L 〈ea〉,Dr:Dq
DIVUL.L 〈ea〉,Dr:Dq
EOR Dn,〈 ea〉
EORI # 〈data 〉,〈ea〉
EORI # 〈data 〉,CCR
32/16 ⇒ 16r:16q
32/32 ⇒ 32q
64/32 ⇒ 32r:32q
32/32 ⇒ 32r:32q
32/16 ⇒ 16r:16q
32/32 ⇒ 32q
64/32 ⇒ 32r:32q
32/32 ⇒ 32r:32q
If supervisor state
the Source ⊕ SR ⇒ SR
else TRAP
Rx ⇔ Ry
Destination Sign-Extended ⇒ Destination
SSP – 2 ⇒ SSP; Vector Offset ⇒ (SSP);
SSP – 4 ⇒ SSP; PC ⇒ (SSP);
SSp – 2 ⇒ SSP; SR ⇒ (SSP);
Illegal Instruction Vector Address ⇒ PC
Destination Address ⇒ PC
SP–4 ⇒ SP; PC ⇒ (SP)
Destination Address ⇒ PC
〈ea〉 ⇒ An
SP – 4 ⇒ SP; An ⇒ (SP)
SP ⇒ An, SP + d ⇒ SP
If supervisor state
Immediate Data ⇒ SR
Interrupt Mask ⇒ External Bus Interface (EBI)
STOP
else TRAP
Destination Shifted by 〈 count〉 ⇒ Destination
Source ⇒ Destination
Source ⇒ Destination
CCR ⇒ Destination
EORI # 〈data 〉,SR
EXG Dx,Dy
EXG Ax,Ay
EXG Dx,Ay
EXG Ay,Dx
EXT.W Dn extend byte to word
EXT.L Dn extend word to long word
EXTB.L Dn extend byte to long word
ILLEGAL
JMP 〈ea〉
JSR 〈ea〉
LEA 〈ea〉,An
LINK An,#〈 displacement〉
LPSTOP #〈 data〉
LSd¹ Dx,Dy
LSd¹ # 〈data 〉,Dy
LSd¹ 〈ea〉
MOVE 〈ea〉,〈ea〉
MOVEA 〈 ea〉,An
MOVE CCR, 〈ea〉
MOTOROLA
MC68340 USER’S MANUAL
5-17
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