MC68340AB16E Datasheet, PDF (117/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
4.3.1 Module Base Address Register (MBAR)
MBAR 1
31
30
BA31 BA30
RESET:
0
0
29
BA29
0
28
BA28
0
27
BA27
0
26
BA26
0
25
BA25
0
24
BA24
0
23
BA23
0
22
BA22
0
21
BA21
0
20
BA20
0
19
BA19
$0003FF00
18
17
16
IBA18 BA17 BA16
0
0
0
0
CPU Space Only
MBAR 2
15
14
13
12
11
BA15 BA14 BA13 BA12
0
RESET
0
0
0
0
0
$0003FF02
10
9
8
7
6
5
4
3
2
1
0
0
AS8 AS7 AS6 AS5 AS4 AS3 AS2 AS1 AS0
V
0
0
0
0
0
0
0
0
0
0
0
CPU Space Only
BA31–BA12—Base Address Bits 31–12
The base address field is the upper 20 bits of the MBAR that provides for block starting
locations in increments of 4-Kbytes.
Bits 11, 10—Reserved
AS8–AS0—Address Space Bits 8–0
The address space field allows particular address spaces to be masked, placing the 4K
module block into a particular address space(s). If an address space is masked, an
access to the register block location in that address space becomes an external access.
The module block is not accessed. The address space bits are as follows:
AS8—mask DMA Space
AS7—mask CPU Space
AS6—mask Supervisor Program
AS5—mask Supervisor Data
AS4—mask Reserved [Motorola]
AS3—mask Reserved [User]
AS2—mask User Program
AS1—mask User Data
AS0—mask Reserved [Motorola]
address space (FC3–FC0 = 1xxx)
address space (FC3–FC0 = 0111)
address space (FC3–FC0 = 0110)
address space (FC3–FC0 = 0101)
address space (FC3–FC0 = 0100)
address space (FC3–FC0 = 0011)
address space (FC3–FC0 = 0010)
address space (FC3–FC0 = 0001)
address space (FC3–FC0 = 0000)
For each address space bit:
1 = Mask this address space from the internal module selection. The bus cycle goes
external.
0 = Decode for the internal module block.
V—Valid Bit
This bit indicates when the contents of the MBAR are valid. The base address value is
not used; therefore, all internal module registers are not accessible until the V-bit is set.
1 = Contents are valid.
0 = Contents are not valid.
4-20
MC68340 USER’S MANUAL
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