MC68340AB16E Datasheet, PDF (374/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
* Timer1 register offsets from timer1 base address
IR1
EQU $604
interrupt register timer1
CR1
EQU $606
control register timer1
SR1
EQU $608
status register timer1
CNTR1
EQU $60A
counter register timer1
COM1
EQU $610
compare register timer1
***************************************************************************
***************************************************************************
* Initialize Timer1
***************************************************************************
LEA MODBASE+TIMER1,A0 Pointer to timer1 module
* Disable timer1
CLR.W
CR1(A0)
* Allow TGATE to negate and assert so that an accurate count will result.
* If SR1 TGL bit=1, continue looping. TGATE is negated.
LOOP1
BTST.B
#$3,SR1(A0)
BNE.B
LOOP1
* If TGL bit=0, continue looping. TGATE is asserted.
LOOP2
BTST.B
#$3,SR1(A0)
BEQ.B
LOOP2
* Ready to initialize timer1, TGATE is negated.
* Module configuration register:
* Timer1 module is set for normal operation, ignore FREEZE.
* Supervisor/user timer1 registers unrestricted.
* Interrupt arbitration at priority $03.
MOVE.W #$0003,MCR1(A0)
* Initialize timer1 interrupt level to 2 and vector to $0F
MOVE.W #$020F,IR1(A0)
* Initialize the compare register to 0
CLR.W
COM1(A0)
* Clear the SR1 TG bit (by writing a 1) to use as a flag
MOVE.B #$20,SR1(A0)
* Control register 1:
* Enable timer1, no interrupts are enabled, TGATE signal used to control
* the counter. Use the selected clock for the counter clock, and enable it.
* Selected clock is 1/2 system's freq. Pulse-width measurement,
* disable TOUT.
8-30
MC68340 USER’S MANUAL
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