MC68340AB16E Datasheet, PDF (378/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
1
TEST LOGIC
RESET
0
1
0
RUN-TEST/IDLE
1
SELECT-DR_SCAN
0
1
CAPTURE-DR
0
SHIFT-DR
0
1
1
EXIT1-DR
0
PAUSE-DR
0
1
0
EXIT2-DR
1
UPDATE-DR
1
0
1
SELECT-IR_SCAN
0
1
CAPTURE-IR
0
SHIFT-IR
0
1
EXIT1-IR
0
PAUSE-IR
0
1
0
EXIT2-IR
1
UPDATE -IR
1
0
Figure 9-2. TAP Controller State Machine
9.3 BOUNDARY SCAN REGISTER
The MC68340 IEEE 1149.1 implementation has a 132-bit boundary scan register. This
register contains bits for all device signal and clock pins and associated control signals.
The XTAL, X2, and XFC pins are associated with analog signals and are not included in
the boundary scan register.
All MC68340 bidirectional pins, except the open-drain I/O pins (DONE1, DONE2, HALT,
and RESET), have a single register bit for pin data and an associated control bit in the
boundary scan register. All open drain I/O pins have two register bits, input and output, for
pin data and no associated control bit. To ensure proper operation, the open-drain pins
require external pullups. Twenty-three control bits in the boundary scan register define the
output enable signal for associated groups of bidirectional and three-state pins. The
control bits and their bit positions are listed in Table 9-1.
MOTOROLA
MC68340 USER’S MANUAL
9-3
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