MC68340AB16E Datasheet, PDF (417/441 Pages) Motorola, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
S0
CLKOUT
0–2 CLOCKS *
S1
S2
S3
S4
S5
6
8
SIZ1–SIZ0
FC3–FC0
A31–A0,
AS
DS
IACKx
18
R/W
DSACK0
DSACK1
11
14
9
12
9A
21
46
31A
47A
31
D15-D0
27
*Up to two wait states may be inserted by the processor between states S0 and S1.
Figure 11-9. IACK Cycle Timing Diagram
13
20
28
29
29A
MOTOROLA
MC68340 USER’S MANUAL
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